On-Die Signal Integrity Monitoring of Gigabit Serial I/Os

This thesis describes an embedded undersampling system for capturing analog waveforms and monitoring signal integrity throughout a signal path. It is intended for use in Gigabit serial products, such as crosspoints and other networking products. Design reuse and simple components were the most important design parameters. The system has a small layout, a simple digital interface, and does not require a separate sample-and-hold circuit. The final system has 15 mV minimum resolution, operates over common-mode logic signals from 1.8V to 1.4V, and accurately captures signals up to 2GHz. Thesis Supervisor: Vladimir Stojanović Title: Assistant Professor Thesis Supervisor: David Rowe Title: Product/Test Engineer, Analog Devices Inc.